Microelectronics technology, and integrated circuit technology in particular, has experienced a period of extremely rapid growth during the past two decades. The mark of increased levels of performance, measured principally by lower power requirements and higher speed, has been decreased size of both the functional devices, or components, and the substrates, or chips, upon which the devices are located. Further sought-after improvements toward higher operating frequencies, lower power requirements, higher speed, and decreased cost will most likely be made through further decreases in device size and increases in the number of devices per area of the chip, i.e., increased functional density. Increased functional density will require improvements in manufacturing techniques, particularly those which selectively delimit or mask the areas or circuit elements of the device undergoing processing.
The technique common to the construction of most semiconductor devices to selectively delimit areas during processing is to create a pattern in a radiation sensitive material, i.e., a resist, located on the chip. The most common technique for creating the pattern is to interpose a mask containing the pattern between a source of radiation and the radiation sensitive material. Thereafter, the sensitive material is developed to selectively remove either the irradiated or nonirradiated material thus creating a secondary image of the pattern in the resist. After the subsequent device processing steps have been completed, the expendable resist layer is removed and then, if required, additional processing cycles of a similar nature may be conducted to fabricate additional levels or layers of the active devices.
Photographic reduction techniques are currently the mainstay of the industry for fabricating the masks and linewidths, i.e., minimum feature sizes, on the order of 2 to 5 microns are commercially prevalent. The most advanced masks, having minimum feature sizes as low as one micron, are produced by electron beam techniques and are used to fabricate the most complex and expensive integrated circuits available today.
The use of masks in the contact photolithography process is the method by which most commercial microelectronic devices are currently fabricated. Improvements in contact photolithographic technology have been principally responsible for the rapid growth of microelectronic technology over the past two decades. The contact photolithographic technique, however, is rapidly reaching practical and theoretical limits imposed by diffraction effects from the openings in the mask and reflection effects within the resist. To a certain extent the diffraction effects may be reduced, and the line widths decreased, by placing the mask in closer proximity to the light-sensitive resist. If the mask is placed in contact with the resist, irregularities on the resist surface may damage the surface of the mask thereby decreasing the service life of the mask and the quality of the patterns produced in the resist.
Some of the problems, principally the diffraction effects, of contact photolithography can be reduced by the use of projection photolithography and shorter wavelength radiation to expose the resist. The optics of the projection system limit the resolution of the projection photolithographic process thus this technique generally provides good resolution only over a limited area. To cover large areas, special techniques, such as step-and-repeat exposures, are required with a concomitant increase in processing time. An advantage of projection photolithography is that no contact is required between the mask and the photoresist thus decreasing the potential for damage to the mask thereby increasing device yield. Despite the many advantages of projection photolithography over contact photolithography, one micron feature size is probably the lower limit of the projection process in production.
Optical lithographic processes are limited in the depth of focus available due to diffraction effects. Moreover, measures used to minimize diffraction effects and produce narrower lines, such as shorter wavelength light and optical systems having small numerical apertures, result in decreases in the depth of focus. In turn, nonflatness of the chip, or wafer, further contributes to the limitation on the depth of focus and, therefore, the resolution. Pioneering techniques which are being developed to decrease the minimum feature size and increase resolution include X-ray lithography, electron beam lithography in the direct-write-on-the-wafer mode and the use of electron beams to fabricate masks for X-ray and photolithography. These later pioneering techniques have domonstrated capability of producing linewidths smaller than those currently obtained by or anticipated for photolithography. In addition to having several technical difficulties and limitations in common with photolithography, these pioneering techniques also have technical problems not experienced by photolithography. Details of these advanced processes, particularly the electron beam technology, may be found in the book, "Electron-Beam Technology in Microelectronic Fabrication", edited by G. R. Brewer (Academic Press, 1980).
In addition to the technical problems, these pioneering techniques are presently limited by extremely high capital equipment costs and rates at which devices or masks can be fabricated, i.e., throughput. Generally, as linewidth decreases, capital equipment costs increase and the time required to process a wafer or a mask increases. As in pointed out at page 49 of the above-cited book, captial equipment costs for electron beam equipment can range from 1.3 to 1.5 million dollars compared to 140 to 380 thousand dollars for photolithographic equipment. Exposure time and resolution are interrelated and impact on the number of wafers or masks that can be produced in a given time period. As shown in FIG. 1.18 of the cited book, the exposure time for a three inch diameter wafer by a 1X contact photolithographic process is about 8 minutes and typically provides 2 micron resolution. At 1 micron resolution, a commercial electron beam machine reportedly requires approximately 100 minutes to expose one three inch wafer or make a mask, i.e. it has a slow writing speed. Therefore, there is a demonstrated need for a cost-efficient high production microlithographic process which can produce high resolution submicron minimum feature size patterns over large areas of resist material used in the manufacture of microelectronic devices.